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lt1881/lt1882 1 18812fb typical application description dual and quad rail-to-rail output, picoamp input precision op amps the lt ? 1881 and lt1882 op amps bring high accuracy input performance to ampli? ers with rail-to-rail output swing. input bias currents and capacitive load driving capabilities are superior to the similar lt1884 and lt1885 ampli? ers, at the cost of a slight loss in speed. input offset voltage is trimmed to less than 50v and the low drift maintains this accuracy over the operating temperature range. input bias currents are an ultralow 200pa maximum. the ampli? ers work on any total power supply voltage between 2.7v and 36v (fully speci? ed from 5v to 15v). output voltage swings to within 40mv of the negative supply and 220mv of the positive supply make these ampli? ers good choices for low voltage single supply operation. capacitive loads up to 1000pf can be driven directly in unity-gain follower applications. the dual lt1881 and lt1881a are available with standard pinouts in s8 and pdip packages. the quad lt1882 is in a 14-pin so package. for a higher speed device with similar dc speci? cations, see the lt1884/lt1885. features applications n offset voltage: 50v maximum (lt1881a) n input bias current: 200pa maximum (lt1881a) n offset voltage drift: 0.8v/c maximum n rail-to-rail output swing n supply range: 2.7v to 36v n operates with single or split supplies n open-loop voltage gain: 1 million minimum n 1ma maximum supply current per ampli? er n stable at a v = 1, c l = 1000pf n standard pinouts n wide operating temperature range: C55c to 125c (lt1882) n thermocouple ampli? ers n bridge transducer conditioners n instrumentation ampli? ers n battery-powered systems n photo current ampli? ers 16-bit voltage output dac on 5v supply tc v os distribution, industrial grade l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. C5v 5v 33pf v out C4.096v to 4.096v ltc ? 1597 dac C + lt1881 + C lt1881 18812 ta01a C5v r com r ofs ref r1 5v 1.65k lt1634 4.096v 5v input offset voltage drift (v/c) 1 C0.8 C0.6 C0.4 C0.2 0 0.2 0.4 0.6 0.8 C0.9 C0.7 C0.5 C0.3 C0.1 0.1 0.3 0.5 0.7 0.9 1 percent of units (%) 18812 ta01b 26 24 22 20 18 16 14 12 10 8 6 4 2 0 v s = 15v 40 n8 (1 lot) 144 s8 (2 lots) 184 total parts
lt1881/lt1882 2 18812fb absolute maximum ratings supply voltage (v + to v C ) .........................................40v differential input voltage (note 2)...........................10v input voltage ..................................................... v + to v C input current (note 2) ..........................................10ma output short-circuit duration (note 3) ............ inde? nite operating temperature range (note 4) lt1881c/lt1882c ................................C40c to 85c lt1881i/lt1882i ..................................C40c to 85c lt1882h ............................................C40c to 125c lt1882mp..........................................C55c to 125c speci? ed temperature range (note 5) lt1881c/lt1882c ................................C40c to 85c lt1881i/lt1882i ..................................C40c to 85c lt1882h ............................................C40c to 125c lt1882mp..........................................C55c to 125c maximum junction temperature........................... 150c storage temperature range ................... C65c to 150c lead temperature (soldering, 10 sec) .................. 300c (note 1) s8 package 8-lead plastic so n8 package 8-lead pdip 1 2 3 4 8 7 6 5 top view v + out b Cin b +in b out a Cin a +in a v C b a t jmax = 150c, ja = 130c/w (n8) t jmax = 150c, ja = 190c/w (s8) top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 9 8 out a Cin a +in a v + +in b Cin b out b out d Cin d +in d v C +in c Cin c out c d a c b t jmax = 150c, ja = 160c/w pin configuration order information lead free finish tape and reel part marking package description specified temperature range lt1881cn8#pbf lt1881cn8#trpbf lt1881cn8 8-lead pdip 0c to 70c lt1881in8#pbf lt1881in8#trpbf lt1881in8 8-lead pdip C40c to 85c lt1881cs8#pbf lt1881cs8#trpbf 1881 8-lead plastic so 0c to 70c lt1881is8#pbf lt1881is8#trpbf 1881i 8-lead plastic so C40c to 85c lt1881acn8#pbf lt1881acn8#trpbf lt1881acn8 8-lead pdip 0c to 70c lt1881ain8#pbf lt1881ain8#trpbf lt1881ain8 8-lead pdip C40c to 85c lt1881acs8#pbf lt1881acs8#trpbf 1881a 8-lead plastic so 0c to 70c lt1881ais8#pbf lt1881ais8#trpbf 1881ai 8-lead plastic so C40c to 85c lt1882cs#pbf lt1882cs#trpbf lt1882cs 14-lead plastic so 0c to 70c lt1882is#pbf lt1882is#trpbf lt1882is 14-lead plastic so C40c to 85c lt1882hs#pbf lt1882hs#trpbf lt1882hs 14-lead plastic so C40c to 125c lt1882mps#pbf lt1882mps#trpbf lt1882mps 14-lead plastic so C55c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
lt1881/lt1882 3 18812fb electrical characteristics symbol parameter conditions c/i grades h/mp grades units min typ max min typ max v os input offset voltage (lt1881a) 0c < t a < 70c C 40c < t a < 85c l l 25 50 85 110 v v v input offset voltage (lt1881/lt1882) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 30 80 125 150 30 80 300 300 v v v v v v os / t input offset voltage drift (note 6) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 0.3 0.3 0.8 0.8 0.3 0.3 0.8 0.8 v/c v/c v/c v/c v os / time long-term input offset voltage stability 0.3 0.3 v/month i os input offset current (lt1881a) 0c < t a < 70c C 40c < t a < 85c l l 100 200 250 300 pa pa pa input offset current (lt1881/lt1882) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 150 500 600 700 150 500 2000 2000 pa pa pa pa pa i b input bias current (lt1881a) 0c < t a < 70c C 40c < t a < 85c l l 100 200 250 300 pa pa pa input bias current (lt1881/lt1882) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 150 500 600 700 150 500 3000 3000 pa pa pa pa pa input noise voltage 0.1hz to 10hz 0.5 0.5 v p-p e n input noise voltage density f = 1khz 14 14 nv/ hz i n input noise current density f = 1khz 0.03 0.03 pa/ hz r in input resistance differential mode common mode l l 20 100 20 100 m g c in input capacitance l 22pf v cm input voltage range l v C + 1.0 v C + 1.2 v+ C 1.0 v+ C 1.2 v C + 1.0 v C + 1.2 v+ C 1.0 v+ C 1.2 v v cmrr common mode rejection ratio 1v < v cm < 4v 1.2v < v cm < 3.8v l 106 104 128 106 102 128 db db psrr power supply rejection ratio v C = 0v, v cm = 1.5v 0c < t a < 85c, 2.7v < v + < 32v 0c < t a < 125c, 2.7v < v + < 32v t a = C40c, 3v < v + < 32v t a = C55c, 3v < v + < 32v l l 106 106 106 106 db db db db minimum operating supply voltage l 2.4 2.7 2.4 2.7 v the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. single supply operation v s = 5v, 0v; v cm = v s /2 unless otherwise noted. (note 5)
lt1881/lt1882 4 18812fb electrical characteristics symbol parameter conditions c/i grades h/mp grades units min typ max min typ max a vol large-signal voltage gain r l = 10k; 1v < v out < 4v l 500 350 1600 500 300 1600 v/mv v/mv r l = 2k; 1v < v out < 4v l 300 250 800 300 200 800 v/mv v/mv r l = 1k; 1v < v out < 4v l 250 200 400 250 150 400 v/mv v/mv v ol output voltage swing low no load i sink = 100a i sink = 1ma i sink = 5ma l l l l 20 25 70 270 40 50 150 600 20 25 70 270 50 60 200 750 mv mv mv mv v oh output voltage swing high (referred to v + ) no load i sink = 100a i sink = 1ma i sink = 5ma l l l l 120 130 180 360 220 230 300 600 120 130 180 360 300 325 450 800 mv mv mv mv i s supply current per ampli? er v s = 3v, 0v l 0.45 0.65 0.85 1.2 0.45 0.65 0.85 1.5 ma ma v s = 5v, 0v l 0.5 0.65 0.9 1.4 0.5 0.65 0.9 1.7 ma ma v s = 12v, 0v l 0.5 0.70 1.0 1.5 0.5 0.70 1.0 1.8 ma ma i sc short-circuit current v out short to gnd v out short to v + l l 15 15 30 30 10 10 30 30 ma ma gbw gain bandwidth product f = 20khz 0.35 1.0 0.35 1.0 mhz channel separation f = 1khz 120 120 db t s settling time 0.01%, v out = 1.5v to 3.5v, a v = C1, r l = 2k 30 30 s sr + slew rate positive a v = C 1 l 0.15 0.12 0.35 0.15 0.1 0.35 v/s v/s sr C slew rate negative a v = C 1 l 0.11 0.08 0.18 0.11 0.06 0.18 v/s v/s fpbw full-power bandwidth v out = 4v p-p (note 10) l 8.75 6.35 14 8.75 4.75 14 khz khz v os offset voltage match (lt1881a) (note 7) 0c < t a < 70c C 40c < t a < 85c l l 30 70 125 160 v v v offset voltage match (lt1881/lt1882) (note 7) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 35 125 175 235 35 125 385 385 v v v v v offset voltage match drift (notes 6, 7) l 0.4 1.2 0.4 1.2 v/c i b + noninverting bias current match (lt1881a) (note 7) 0c < t a < 70c C 40c < t a < 85c l l 200 300 400 500 pa pa pa the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. single supply operation v s = 5v, 0v; v cm = v s /2 unless otherwise noted. (note 5)
lt1881/lt1882 5 18812fb symbol parameter conditions c/i grades h/mp grades units min typ max min typ max i b + noninverting bias current match (lt1881/lt1882) (note 7) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 250 700 900 1000 250 700 2000 2000 pa pa pa pa pa cmrr common mode rejection ratio match (notes 7, 9) l 102 125 100 125 db psrr power supply rejection match (notes 7, 9) v C = 0v, v cm = 1.5v 0c < t a < 85c, 2.7v < v + < 32v 0c < t a < 125c, 2.7v < v + < 32v t a = C40c, 3v < v + < 32v t a = C55c, 3v < v + < 32v l l 104 104 126 126 102 102 126 126 db db db db electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. single supply operation v s = 5v, 0v; v cm = v s /2 unless otherwise noted. (note 5) the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. split supply operation v s = 15v, v cm = 0v unless otherwise noted. (note 5) symbol parameter conditions c/i grades h/mp grades units min typ max min typ max v os input offset voltage (lt1881a) 0c < t a < 70c C 40c < t a < 85c l l 25 50 85 110 v v v input offset voltage (lt1881/lt1882) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 30 80 125 150 30 80 300 300 v v v v v v os / t input offset voltage drift (note 6) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 0.3 0.3 0.8 0.8 0.3 0.3 0.8 0.8 v/c v/c v/c v/c v os / time long-term input offset voltage stability 0.3 0.3 v/month i os input offset current (lt1881a) 0c < t a < 70c C 40c < t a < 85c l l 100 200 250 300 pa pa pa input offset current (lt1881/lt1882) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 150 500 600 700 150 500 2000 2000 pa pa pa pa pa i b input bias current (lt1881a) 0c < t a < 70c C 40c < t a < 85c l l 100 200 250 300 pa pa pa input bias current (lt1881/lt1882) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 150 500 600 700 150 500 3000 3000 pa pa pa pa pa
lt1881/lt1882 6 18812fb electrical characteristics symbol parameter conditions c/i grades h/mp grades units min typ max min typ max input noise voltage 0.1hz to 10hz 0.5 0.5 v p-p e n input noise voltage density f = 1khz 14 14 nv/ hz i n input noise current density f = 1khz 0.03 0.03 pa/ hz r in input resistance differential mode common mode l l 20 100 20 100 m g c in input capacitance l 22pf v cm input voltage range l v C + 1.0 v C + 1.2 v + C 1.0 v + C 1.2 v C + 1.0 v C + 1.2 v + C 1.0 v + C 1.2 v v cmrr common mode rejection ratio C13.5v < v cm < 13.5v l 114 130 110 130 db +psrr positive power supply rejection ratio v C = C15v, v cm = 0v; 1.5v < v + < 18v l 110 132 108 132 db Cpsrr negative power supply rejection ratio v + = 15v, v cm = 0v; C1.5v < v C < C18v l 106 132 104 132 db minimum operating supply voltage l 1.2 1.35 1.2 1.35 v a vol large-signal voltage gain r l = 10k; C13.5v < v out < 13.5v l 1000 700 1600 1000 500 1600 v/mv v/mv r l = 2k; C13.5v < v out < 4v l 175 125 420 175 110 420 v/mv v/mv r l = 1k; 1v < v out < 4v l 90 65 230 90 7 230 v/mv v/mv v ol output voltage swing low (referred to v ee ) no load i sink = 100a i sink = 1ma i sink = 5ma l l l l 20 25 70 270 40 50 150 600 20 25 70 270 50 60 200 750 mv mv mv mv v oh output voltage swing high (referred to v cc ) no load i source = 100a i source = 1ma i source = 5ma l l l l 120 130 180 360 220 230 300 600 120 130 180 360 300 325 450 800 mv mv mv mv i s supply current per ampli? er v s = 15v l 0.5 0.85 1.1 1.6 0.5 0.85 1.1 2.0 ma ma i sc short-circuit current v out short to v C l 20 15 40 40 20 10 40 40 ma ma v out short to v + l 20 15 30 30 20 10 30 30 ma ma gbw gain bandwidth product f = 20khz 0.4 0.85 0.4 0.85 mhz channel separation f = 1khz 120 120 db t s settling time 0.01%, v out = C 5v to 5v, a v = C1, r l = 2k 30 30 s sr + slew rate positive a v = C1 l 0.21 0.18 0.4 0.21 0.15 0.4 v/s v/s sr C slew rate negative a v = C1 l 0.13 0.1 0.20 0.11 0.07 0.20 v/s v/s the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. split supply operation v s = 15v, v cm = 0v unless otherwise noted. (note 5)
lt1881/lt1882 7 18812fb symbol parameter conditions c/i grades h/mp grades units min typ max min typ max fpbw full-power bandwidth v out = 28v p-p (note 10) l 1.47 1.13 2.25 1.47 0.79 2.25 khz khz v os offset voltage match (lt1881a) (note 7) 0c < t a < 70c C 40c < t a < 85c l l 35 70 125 160 v v v offset voltage match (lt1881/lt1882) (note 7) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 42 125 175 235 42 125 435 435 v v v v v offset voltage match drift (notes 6, 7) l 0.4 1.1 0.4 1.1 v/c i b + noninverting bias current match (lt1881a) (note 7) 0c < t a < 70c C 40c < t a < 85c l l 200 300 400 500 pa pa pa i b + noninverting bias current match (lt1881/lt1882) (note 7) 0c < t a < 70c C 40c < t a < 85c C 40c < t a < 125c C 55c < t a < 125c l l l l 250 700 900 1000 250 700 2000 2000 pa pa pa pa pa cmrr common mode rejection match (notes 7, 9) l 110 125 106 125 db +psrr positive power supply rejection ratio match v C = C 15v, v cm = 0v, 1.5v < v + < 18v, (notes 7, 9) l 108 130 108 130 db Cpsrr negative power supply rejection ratio match v + = 15v, v cm = 0v, C 1.5v < v C < C 18v, (notes 7, 9) l 104 130 104 130 db electrical characteristics electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the inputs are protected by internal resistors and back-to-back diodes. if the differential input voltage exceeds 0.7v, the input current should be limited externally to less than 10ma. note 3: a heat sink may be required to keep the junction temperature below absolute maximum. note 4: the lt1881c/lt1882c and lt1881i/lt1882i are guaranteed functional over the operating temperature range of C 40c to 85c. the lt1882h is guaranteed functional over the operating temperature range C40c to 125c. the lt1882mp is guaranteed functional over the operating temperature range C55c to 125c. note 5: the lt1881c/lt1882c are guaranteed to meet speci? ed performance from 0c to 70c. the lt1881c/lt1882c are designed, characterized and expected to meet speci? ed performance from C 40c to 85c but are not tested or qa sampled at these temperatures. the lt1881i/lt1882i are guaranteed to meet speci? ed performance from C 40c to 85c. the lt1882h is guaranteed to meet speci? ed performance from C40c to 125c. the lt1882mp is guaranteed to meet speci? ed performance from C55c to 125c. note 6: this parameter is not 100% tested. note 7: matching parameters are the difference between ampli? ers a and b in the lt1881; and between ampli? ers a and d and b and c in the lt1882. note 8: this parameter is the difference between the two noninverting input bias currents. note 9: cmrr and psrr are de? ned as follows: cmrr and psrr are measured in v/v on each ampli? er. the difference is calculated in v/v and then converted to db. note 10: full power bandwidth is calculated from the slew rate: fpbw = sr/2v p. the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. split supply operation v s = 15v, v cm = 0v unless otherwise noted. (note 5)
lt1881/lt1882 8 18812fb typical performance characteristics supply current per ampli? er vs supply voltage slew rate vs supply voltage slew rate vs temperature settling time vs output step settling time vs output step gain bandwidth product vs supply voltage phase margin vs supply voltage gain vs frequency, a v = C1 gain vs frequency, a v = 1 total supply voltage (v) supply current per amplifier (a) 18812 g01 1200 1000 800 600 400 200 0 125c 25c C55c 0 4 8 12 16 20 24 28 32 36 total supply voltage (v) 0 slew rate (v/s) 18812 g02 4 8 12 16 20 24 28 32 36 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 falling rising a v = C1 temperature (c) C50 slew rate (v/s) 18812 g03 C25 0 25 50 75 100 125 150 0.5 0.4 0.3 0.2 0.1 0 falling rising v s = 15v a v = C1 v s = 5v v s = 15v v s = 5v settling time (s) 0 output step (v) 18812 g04 5 10 15 20 25 30 35 40 45 50 55 60 65 10 8 6 4 2 0 C2 C4 C6 C8 C10 v s = 15v a v = C1 0.1% 0.01% 0.1% 0.01% settling time (s) 0 output step (v) 18812 g05 5 10 15 20 25 30 35 40 45 50 55 60 65 10 8 6 4 2 0 C2 C4 C6 C8 C10 v s = 15v a v = 1 0.1% 0.01% 0.1% 0.01% total supply voltage (v) 0 gain bandwidth product (khz) 18812 g06 4 8 12 16 20 24 28 32 36 900 850 800 750 700 650 600 C55c 125c 25c total supply voltage (v) 0 phase margin (deg) 18812 g07 4 8 12 16 20 24 28 32 36 60 58 56 54 52 50 48 46 125c C55c 125c frequency (hz) 1k gain (db) 10k 100k 1m 10m 100m 10 0 C10 C20 C30 C40 v s = 15v v s = 2.5v 18812 g08 frequency (hz) 1k gain (db) 10k 100k 1m 10m 100m 10 0 C10 C20 C30 C40 v s = 15v v s = 2.5v 18812 g09
lt1881/lt1882 9 18812fb typical performance characteristics gain vs frequency with c load , a v = 1 gain vs frequency with c load , a v = C1 large signal response, a v = C1 large signal response, a v = 1 small signal response, a v = C1, no load small signal response, a v = C1, c l = 1000pf small signal response, a v = 1, r l = 2k small signal response, a v = 1, c l = 500pf frequency (hz) 1k gain (db) 18812 g10 10k 100k 1m 10m 100m 10 0 C10 C20 C30 C40 0pf 1500pf v s = 15v 1000pf 500pf frequency (hz) 1k gain (db) 18812 g11 10k 100k 1m 10m 100m 10 0 C10 C20 C30 C40 1800pf v s = 15v 1000pf 500pf 0pf time (50s/div) v out (5v/div) 18812 g12 time (50s/div) v out (5v/div) 18812 g13 time (2s/div) v out (20mv/div) 18812 g14 time (2s/div) v out (20mv/div) 18812 g15 time (2s/div) v out (20mv/div) 18812 g16 time (2s/div) v out (20mv/div) 18812 g17
lt1881/lt1882 10 18812fb v os distribution, t a = 25c voltage offset vs temperature warm-up drift vs time input bias current vs common mode voltage input bias current vs temperature input common mode range vs supply voltage input common mode range vs temperature output voltage swing vs supply voltage output saturation voltage vs load current (output high) typical performance characteristics output offset voltage (v) percent of units (%) 18812 g18 26 24 22 20 18 16 14 12 10 8 6 4 2 0 C60 C40 C20 0 20 40 60 v s = 15v 40 n8 (1 lot) 144 s8 (2 lots) 184 total parts temperature (c) voltage offset (v) 18812 g19 200 150 100 50 0 C50 C100 C150 C200 C55 C35 C15 5 25 45 65 85 105 125 v s = 15v time after power up (s) offset voltage drift (v) 18812 g20 5 0 C5 C10 C15 C20 C25 C30 0 20 40 60 80 100 120 140 n8 v s = 5v n8 v s = 15v s8 v s = 5v, 15v v cm (v) i bias (pa) 18812 g21 1000 800 600 400 200 0 200 400 600 800 1000 C20 C15 C10 C5 0 5 10 15 20 v s = 15v temperature (c) input bias current (pa) 18812 g22 C55 C35 C15 5 25 45 65 85 105 125 v s = 15v Ci bias +i bias 1400 1200 1000 800 600 400 200 0 C200 supply voltage (v) input common mode range (v) 18812 g23 v + C 0 v + C 0.2 v + C 0.4 v + C 0.6 v + C 0.8 v C + 0.8 v C + 0.6 v C + 0.4 v C + 0.2 v C + 0 02 4 6 8 10 12 14 16 $ v os 1mv C55c C40c 25c 85c 125c temperature (c) input common mode limit (v) 18812 g24 5 4 3 2 1 0 C1 C2 C3 C4 C5 C55 C35 C15 5 25 65 45 85 105 125 lower limit upper limit v s = 5v $ v os < 1mv supply voltage (v) output voltage swing (v) 18812 g25 v + C 0 v + C 0.5 v + C 1.0 v C + 1.0 v C + 0.5 v C + 0 02 4 6 8 10 12 14 16 18 20 a v = C1 t a = 25c r l = 10k r l = 2k r l = 10k r l = 2k sourcing load current (ma) 0.001 0.01 output saturation voltage (v) 0.1 1 0.1 0.01 1 10 18812 g26 v s = 15v v overdrive = 30mv t a = C55c t a = C40c t a = 25c t a = 85c t a = 125c
lt1881/lt1882 11 18812fb output saturation voltage vs load current (output low) output short-circuit current vs temperature output voltage vs large input voltage open-loop gain vs frequency open-loop gain and phase vs frequency channel separation vs frequency gain bandwidth product vs temperature output impedance vs frequency psrr vs frequency typical performance characteristics sinking load current (ma) output saturation voltage (v) 0.001 0.1 1 10 18812 g27 0.01 10 1 0.1 0.01 v s = 15v v overdrive = 30mv 0.001 t a = C55c t a = C40c t a = 25c t a = 85c t a = 125c temperature (c) output short-circuit current (ma) 18812 g28 60 56 52 48 44 40 36 32 28 24 20 16 12 8 4 0 C55 C35 C15 5 25 45 65 85 105 125 sinking sourcing a v = 1 v s = 2.5v v in = 5v r in = 10k 18812 g29 gnd gnd v out v in frequency (hz) loop gain (db) 18812 g30 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 C10 C20 0.1 1 10 100 1k 10k 100k 1m 10m 100m v s = 15v frequency (hz) 1k loop gain (db) 70 60 50 40 30 20 10 0 C10 C20 C30 phase (deg) 175 150 120 100 75 50 25 0 C25 C50 C100 100k 10k 1m 10m 18812 g31 v s = 5v phase loop gain frequency (hz) channel separation (db) 18812 g32 C20 C40 C60 C80 C100 C120 C140 10 100 1k 10k 100k 1m 10m 100m v s = 15v a v = 10 temperature (c) gain bandwidth product (khz) 18812 g33 680 660 640 620 600 580 560 C55 C35 C15 5 45 25 65 85 105 125 v s = 15v v s = 2.5v frequency (hz) 100 1k 10k 100k 0.001 output impedance () 0.1 100 18812 g34 0.01 1 10 v s = 2.5v a v = 100 a v = 10 a v = 1 frequency (hz) 1 10 100 1k 10k 100k 1m pssr (db) 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 C10 18812 g35 Cpssr v s = 15v +pssr
lt1881/lt1882 12 18812fb typical performance characteristics common mode rejection ratio vs frequency 0.1hz to 10hz noise noise voltage vs frequency noise current density vs frequency total noise vs source resistance overshoot vs capacitive load series output resistance vs capacitive load undistorted output swing vs frequency thd + noise vs frequency frequency (hz) 0.1 1 10 100 1k 10k 100k 1m cmrr (db) 120 100 80 60 40 20 0 1881/2 g36 1s/div 0 5 10 15 20 25 30 noise voltage (0.2v/div) 18812 g37 frequency (hz) 1 noise voltage density (nv/vhz) 50 45 40 35 30 25 20 15 10 5 0 100 10 1k 18812 g38 v s = 5v a v = 1 frequency (hz) 1 noise current density (fa/ hz ) 180 160 140 120 100 80 60 40 20 0 100 10 1000 18812 g39 v s = 15v r s () 1 10 100 1k 10k 100k 1m total input referred noise (nv/ hz ) 1000 100 10 1 18812 g40 capacitive load (pf) 10 overshoot (%) 30 25 20 15 10 5 0 1k 100 10k 18812 g41 v s = 15v r l = 10k a v = 1 a v = C1 capacitive load (pf) 0 2000 4000 6000 8000 10000 series output resistance () 120 100 80 60 40 20 0 1881/2 g42 a v = 1 t a = 25c v s = 2.5v v s = 15v frequency (khz) 1 peak-to-peak output voltage (v) 35 30 25 20 15 10 5 0 100 10 18812 g43 a v = C1 t a = 25c v s = 15v a v = C1 t a = 25c v s = 2.5v frequency (hz) 10 thd + noise (%) 10 1 0.1 0.01 0.001 0.0001 1k 100 10k 100k 18812 g44 v s = 15v v in = 2v p-p a v = C1 a v = 1
lt1881/lt1882 13 18812fb typical performance characteristics total harmonic distortion + noise vs output voltage amplitude open-loop gain settling time/output step 0.01% settling time/output step 0.01% gain vs temperature gain vs load resistance output voltage amplitude (v p-p ) 10m thd + noise (%) 10 1 0.1 0.01 0.001 1 0.1 10 100 18812 g45 f = 1khz rf = rg = 10k a v = C1 v s = 15v a v = C1 v s = 2.5v a v = 2 v s = 15v a v = 2 v s = 2.5v output voltage (5v/div) change in input offset voltage (20v/div) 18812 g46 r l = 2k r l = 50k r l = 10k 20s/div gnd 10v 0.5mv/div a v = 1 v s = 15v 18812 g47 50s/div 10v gnd 0.5mv/div a v = 1 v s = 15v 18812 g48 temperature (c) gain (v/v) 18812 g49 6.0 5.0 4.0 3.0 2.0 1.0 0 C60 C40 0 C20 20 80 60 40 100 120 130 v s = 5v r l = 10k 0v to 10v 0v to C10v r l = 2k load resistance (k) gain (v/v) 18812 g50 10.0 1.0 0.1 05 10 15 20 25 30 v s = 15v +a vol (0v to 10v) Ca vol (0v to C10v)
lt1881/lt1882 14 18812fb the lt1881 dual and lt1882 quad op amps feature exceptional input precision with rail-to-rail output swing. the ampli? ers are similar to the lt1884 and lt1885 devices. the lt1881 and lt1882 offer superior capacitive load driving capabilities over the lt1884 and lt1885 in low voltage gain con? gurations. offset voltages are trimmed to less than 50v and input bias currents are less than 200pa on the a grade devices. obtaining bene? cial advantage of these precision input characteristics depends upon proper applications circuit design and board layout. preserving input precision preserving the input voltage accuracy of the lt1881/lt1882 requires that the applications circuit and pc board layout do not introduce errors comparable to or greater than the 30v offset. temperature differentials across the input connections can generate thermocouple voltages of 10s of microvolts. pc board layouts should keep connections to the ampli? ers input pins close together and away from heat dissipating components. air currents across the board can also generate temperature differentials. the extremely low input bias currents, 150pa, allow high accuracy to be maintained with high impedance sources and feedback networks. the lt1881/lt1882s low input bias currents are obtained by using a cancellation circuit on-chip. this causes the resulting i bias + and i bias C to be uncorrelated, as implied by the i os speci? cation being greater than the i bias . the user should not try to balance the input resistances in each input lead, as is commonly recommended with most ampli? ers. the impedance at either input should be kept as small as possible to minimize total circuit error. pc board layout is important to insure that leakage currents do not corrupt the low i bias of the ampli? er. in high precision, high impedance circuits, the input pins should be surrounded by a guard ring of pc board interconnect, with the guard driven to the same common mode voltage as the ampli? er inputs. input common mode range the lt1881 and lt1882 outputs are able to swing nearly to each power supply rail, but the input stage is limited to operating between v C +1v and v + C1v. exceeding this common mode range will cause the gain to drop to zero; however, no phase reversal will occur. input protection the inverting and noninverting input pins of the lt1881 and lt1882 have limited on-chip protection. esd protection is provided to prevent damage during handling. the input transistors have voltage clamping and limiting resistors to protect against input differentials up to 10v. short transients above this level will also be tolerated. if the input pins can see a sustained differential voltage above 10v, external limiting resistors should be used to prevent damage to the ampli? er. a 1k resistor in each input lead will provide protection against a 30v differential voltage. capacitive loads the lt1881 and lt1882 can drive capacitive loads up to 1000pf in unity-gain. the capacitive load driving increases as the ampli? er is used in higher gain con? gurations. capacitive load driving may be increased by decoupling the capacitance from the output with a small resistance. applications information
lt1881/lt1882 15 18812fb package description n8 package 8-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) n8 1002 .065 (1.651) typ .045 C .065 (1.143 C 1.651) .130 .005 (3.302 0.127) .020 (0.508) min .018 .003 (0.457 0.076) .120 (3.048) min 12 3 4 87 6 5 .255 .015* (6.477 0.381) .400* (10.160) max .008 C .015 (0.203 C 0.381) .300 C .325 (7.620 C 8.255) .325 +.035 C.015 +0.889 C0.381 8.255 () note: 1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) .100 (2.54) bsc
lt1881/lt1882 16 18812fb s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) package description .016 C .050 (0.406 C 1.270) .010 C .020 (0.254 C 0.508) s 45 0C 8 typ .008 C .010 (0.203 C 0.254) so8 0303 .053 C .069 (1.346 C 1.752) .014 C .019 (0.355 C 0.483) typ .004 C .010 (0.101 C 0.254) .050 (1.270) bsc 1 2 3 4 .150 C .157 (3.810 C 3.988) note 3 8 7 6 5 .189 C .197 (4.801 C 5.004) note 3 .228 C .244 (5.791 C 6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm)
lt1881/lt1882 17 18812fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description s package 14-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 1 n 2 3 4 .150 C .157 (3.810 C 3.988) note 3 14 13 .337 C .344 (8.560 C 8.738) note 3 .228 C .244 (5.791 C 6.197) 12 11 10 9 5 6 7 n/2 8 .016 C .050 (0.406 C 1.270) .010 C .020 (0.254 C 0.508) s 45 0 C 8 typ .008 C .010 (0.203 C 0.254) s14 0502 .053 C .069 (1.346 C 1.752) .014 C .019 (0.355 C 0.483) typ .004 C .010 (0.101 C 0.254) .050 (1.270) bsc .245 min n 1 2 3 n/2 .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm)
lt1881/lt1882 18 18812fb ? linear technology corporation 2000 lt 0809 rev b ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com related parts typical application part number description comments lt1112/lt1114 dual/quad picoamp input op amps v os = 60v max lt1167 gain programmable instrumentation amp gain error = 0.08% max lt1677 low noise, rail-to-rail precision op amp e n = 3.2nv/ hz lt1793 low noise jfet op amp i b = 10pa max lt1880 sot-23 picoamp input precision op amp 150v max v os , C 40c to 85c operation guaranteed, sot-23 package lt1884/lt1885 dual/quad picoamp input op amps 3 times faster than lt1881/lt1882 ltc2050 zero drift op amp in sot-23 v os = 3v max, rail-to-rail output ltc6011/ltc6012 dual/quad 135a rail-to-rail output precision op amps lower power, available in dfn package ltc6081/ltc6082 dual/quad precision cmos op amps i b = 1pa max, v os = 70v max C50c to 600c digital thermometer operates on 3.3v + C a1 1/2 lt1881 + C a2 1/2 lt1881 r f 1k 10k 0.1% rt: omega f4132 1000 rtd r1, r2, r3, rf: use bi 698-3 2k s 8 resistor network 18812 ta02 v cc v cc r t r3 1k r1 4k r2 4k v cc = 3.3v 10k 0.1% v = + 1.588mv/c v cc 2 v ref v cc 1f +in clk ltc1287 Cin d out gnd cs/shdn

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